Sensor Node Circuits with Solar Energy Harvesting Team : SNEH Date : 2013/05/ Donghyeon-Seo.

Presentation on theme: "Sensor Node Circuits with Solar Energy Harvesting Team : SNEH Date : 2013/05/ Donghyeon-Seo."— Presentation transcript:

1 Sensor Node Circuits with Solar Energy Harvesting Team : SNEH Date : 2013/05/14 2701077 Donghyeon-Seo

2 Contents 2 1.SAR ADC Top circuit Block diagram Principle of operation Comparator circuit SAR circuit Digital signal Power consumption 2.SNEH 3.Reference

3 SAR ADC 3 Top circuit

4 SAR ADC 4

5 5 SAR ADC block diagram

6 SAR ADC 6 SAR ADC circuit Data_Sampling Vin Vgnd Vcm Vref Vcm Vgnd Vref

7 SAR ADC 7 Principle of Operation 3bit SAR ADC Vref1.2V Vcm0.9V Vgnd0.6V Vin1V

8 SAR ADC 8 Principle of Operation Digital Signal = 1

9 SAR ADC 9 Principle of Operation Digital Signal = 0

10 SAR ADC 10 Principle of Operation Digital Signal = 1

11 SAR ADC 11 Comparator The accurate minimum input signal difference = 0.2mV

12 SAR ADC 12 Comparator circuit

13 SAR ADC 13 SAR Logic

14 SAR ADC 14 SAR logic circuit S9 ~S7 S6 ~S4 S3 ~S2 S1 ~S0 S9S8 S7 S6 S5 S4 S3 S2S1 S0 CLK D9D8 D7 D6 D5 D4 D3 D2D1 D0 Samp Comp

15 SAR ADC 15 SAR ADC test circuit Vin = Sine wave Frequency = 20Hz

16 SAR ADC 16 SAR ADC digital signal MSB LSB

17 SAR ADC 17 SAR ADC digital signal - matlab

18 SAR ADC 18 Performance of the comparator Power consumption = 35.41nW Current consumption = 20nA Tp = 41ns

19 SAR ADC 19 Power consumption of SAR logic & DB SAR Logic Power consumption = 166nW Current consumption = 92nA SAR ADC Power consumption = 208.3nW Current consumption = 116nA

20 SNEH 20 Sensor node circuit Input voltage Vref1.138V Vcm869.2mV Vgnd599.7mV Vin921.3mV

21 SNEH 21 Sensor node simulation D9 = 1 D8 = 0 D7 = 0 D6 = 1 D5 = 1 D4 = 0 D3 = 0 D2 = 0 D1 = 1 D0 = 1

22 SNEH 22 Simulation result Vin = 0.9213V Digital Signal D9 + D6 + D5 + D1 + D0 + Vgnd = 0.2692 + 0.03365 + 0.01683 + 0.0011 +0.00053 + 0.5997 = 0.9210V Voltage difference = 0.3mV 1bit voltage = 0.5mV

23 Reference 1. 심상미, 박준규, 강현철, 유종근 “ 고성능 CMOS LDO 레귤레이터 설계 ” 대한전기학회, 대한전기 학회 학술대회 논문집, 2007.10, 187-188 (2 pages) 2. 유재영, 방준호, 유인호, 이우춘 “ 능동 Replica LDO 레귤레이터를 위한 DC 정합회로 설계 ” [KISTI 연계 ] 한국산학기술학회 학술발표대회자료 2011, 362-365, 2011 3.Daniela De Venuto, Low Power High-Resolution Smart Temperature Sensor for Autonomous Multi-Sensor System, 2012 4.Gystavo Della Colletta, A Low Power Successive Approximation A/D Converter based on PWM techique 5. 박강수, 데이터 변환기를 사용한 고정밀 CMOS 온도 센서의 설계, 한양대 대학원 박 사 학위 논문, 2012 6. 박영근, 저전력 12- 비트 연속 근사 아날로그 디지털 변환기에 대한 연구, 서강대 대학 원 석사 학위 논문, 2011 7. IDEC 강좌, Successive Approximation ADC & Time-interleaving, 카이스트 MSICL, 2012 8. William H. Hayt, Engineering Circuit Analysis 9. 유종근, Analog Integrated Circuit, 인천대학교 10. 김교선, 디지털 논리 설계, 인천대학교 11.Raheleh Hedayati, A Study of Successive Approximation Registersand 12. Implementation ofan Ultra-Low Power 10-bit SAR ADCin 65nm CMOS Technology, Elextronic Devices, 2011 23

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