Chapter 7. Digital Electronics

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1 Chapter 7. Digital Electronics

2 Motivation Computer interface & programming! 센서 actuator
analog digital 센서회로 센서 컴퓨터 Interface board 외부세계 (빛, 온도, 압력, 전류,…) actuator Driver Computer interface & programming! * Deadline of project plan submission: 11/2(수)

3 1. Basic Logic Concepts

4 Analog (continous) vs. Digital (discrete)
* The world in which we live is analog. Ex. sound, temperature, pH, light intensity, electrical conductivity, electric, magnetic fields, the flow of time, …. *Some signals are digital by nature Ex. particle detector, light intensity, keyboard, Boolean logic, …. *It is often desirable to convert analog data to digital form for data storage and processing (A/D and D/A converters). Ex. multimeter, oscilloscope, DSP, computer, …. *Robustness: data transmission without degradation (PCM). Ex. Telephone, CD, …. *Fragility and parity bits

5 Logic levels and noise margin or noise immunity
-HIGH & LOW -TRUE & FALSE (positive true vs. negative true) -1 & 0

6 Combinational logic & logic gates
George Boole *Logic gates perform logical operations on one or more logic inputs and produces a single logic output (Boolean logic or Boolean arithmetic).

7 등가회로(NAND또는 NOR만 사용) 실질적으로 NAND나 NOR 게이트가 CMOS등의 회로로 만들기가 가장 간단함.

8 Number systems & binary arithmetic
-Decimal -Binary -Hexadecimal -BCD: = *Gray code 0000 0001 0011 0010 0110 0111 0101 0100 1100 1101 1111 1110 1010 1011 1001 1000

9 2. TTL & CMOS

10 Diode logic OR gate AND gate
- Diode logic was superseded by transistor logic in most applications. The main drawbacks of diode logic are that it cannot be used to build a NOT gate and signals degrade after only a few layers of gates causing loss of noise immunity and unreliable logic operation. Diode는 p (또는 n) 쪽이 high(또는 low)일 경우 전압이 그대로 전달되고, 그 반대일 경우 끊어진 것으로 보고 논리회로의 output전압을 판단하면 됨.

11 DTL & TTL EA(n) EB(n) B(p) C(n) TTL NAND gate DTL NAND gate. Inverter
EA나 EB중 하나라도 low(F) 면 -> BE 다이오드에 순방향 전압이므로, B는 low+0.6 -> B가 low이므로, C도 low -> 오른쪽 TR이 닫혀서 Q=high(T) -EA, EB가 모두 high(T)면 -> B=high -> C=high -> 오른쪽 TR이 열려서 Q=low(F) TTL NAND gate DTL NAND gate. First, take the inverse of the entire function. ‘OR’ : parallel connection ‘AND’ : serial connection Inverter NOR

12 Inverter VF ~ 0.6 V i) If Vin = 5, IB= (Vin-0.6)/R1
IC= hFE x IB= hFE(Vin-0.6)/R1 Vout = 5 - R2 x IC = 5 – R2 x hFE x (Vin-0.6)/R1 위의 식으로 계산하면 Vout 이 0 보다 작은 작은 값이 나온다. 그러나, Vout의 최저치는 0 이므로, Vout ~0 if hFE is very large ii) If Vin = 0 IB = 0 IC=0 Vout = 5V R1 R2

13 7400 Series TTL became popular with electronic systems designers in 1962 after Texas Instruments introduced the 7400 series of ICs, which had a wide range of digital logic block functions, and Sylvania introduced a similar family of products. The Texas Instrument family became an industry standard. The 7400 series of TTL integrated circuits are historically important as the first widespread family of IC logic.

14 CMOS CMOS circuits were invented in 1963 by Frank Wanlass at Fairchild Semiconductor. The first CMOS integrated circuits were made by RCA in 1968 by a group led by Albert Medwin. Originally a low-power but slow alternative to TTL, CMOS found early adopters in the watch industry and in other fields where battery life was more important than speed. Some twenty-five years later, CMOS has become the predominant technology in digital integrated circuits. This is essentially because area occupation, operating speed, energy efficiency and manufacturing costs have benefited and continue to benefit from the geometric downsizing that comes with every new generation of semiconductor manufacturing processes. In addition, the simplicity and comparatively low power dissipation of CMOS circuits have allowed for integration densities not possible on the basis of bipolar junction transistors. Standard discrete CMOS logic functions were originally available only in the 4000 series (RCA "COS/MOS") integrated circuits. Later many functions in the 7400 series began to be fabricated in CMOS, NMOS, BiCMOS or another variant. close 1 open

15 CMOS(Complementary MOSFET)회로 : CMOS Inverter
If Vin = 5V (input high), -> VGSn = 5V > |VTn| VSGp = 0V < |VTp| -> n-MOS: ON with a small R (VDS ~ 0 < VGT-VT : Linear Region) p-MOS: OFF with an infinite R -> NO Current -> Vout = 0 (output low) 2) If Vin = 0V (input low), -> VGSn = 0V < |VTn| VSGp = 5V > |VTp| -> n-MOS: OFF with an infinite R p-MOS: ON with a small R (VSD ~ 0 < VSG-VT : Linear Region) -> Vout = 5V (output high) =5V S p-MOS (Load) D D n-MOS (Driver) S No static power consumption for CMOS Circuits. -> Integrated Circuits for Computer Processors.

16 CMOS Logic VDD NAND Gate A B Z Z A B VDD NOR Gate A B A B Z Z
Logic Circuit in CMOS Architecture pMOS : First, take the inverse of ‘each’ variable ‘OR’ : parallel connection ‘AND’ : Serial Connection nMOS : First, take the inverse of the entire function. ‘OR’ : parallel connection ‘AND : serial connection VDD NAND Gate A B Z Z A B Note) The logic functions are implemented twice, once in NMOS and once in PMOS devices. Zero static power dissipation. All devices can be the same size and circuit functions correctly. The output of a logic circuit is connected to the input of the next logic circuit. VDD NOR Gate A B A B Z Z

17 SN74LS00N 54: Mil Spec 제조사 series family gate type
LS low power Schottky ALS advanced LS F fast HC high speed CMOS HCT high speed CMOS (TTL compatible) AC advanced CMOS

18 Emitter-coupled logic
Of many families, only five (TTL, CMOS, NMOS, ECL, and BiCMOS) are currently still in widespread use. ECL is used for very high speed applications because of its price and power demands, while CMOS logic is mainly used in VLSI (Very Large Scale Integrated Circuits) applications such as CPUs and memory chips Emitter-coupled logic ECL was invented in August 1956 at IBM by Hannon S. Yourke. Originally called current steering logic, it was used in both the Stretch, IBM 7090, and IBM 7094 computers. BiCMOS, also called BiMOS In integrated circuit technologies, BiCMOS, also called BiMOS, refers to the integration of bipolar junction transistors and CMOS technology into a single device. BiCMOS Inverter

19 3. Combinational Logic -circuits in which the output state depends
only on the present input states. -can be constructed with gates alone

20 Multiplexer (Mux) - 여러 개의 입력 중 하나를 출력으로 나가도록 선정
- parallel 신호를 serial 신호로 전환 NOT S A B Q 1 AND 1 A OR 1 B A B D0 D1 D2 D3 D4 D5 D6 D7 Q A0 A1 A2 E ’151 A1 B1 A2 B2 A3 B3 A4 B4 Q1 Q2 Q3 Q4 SEL E ’157 Enable Select 8-input multiplexer Quad 2-input selector (multiplexer)

21 Multiplexer Expansion

22 Decoder 특정 address에 대해 한 개의 output만 내보내는 기능 1-of-8 decoder (’138) A
B C Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 A B C Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 1-of-8 decoder (’138)

23 Encoder non-zero인 부분이 있는지 표시 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 A B C D
A B C Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 D *priority encoder: generate a binary code giving the address of the highest numbered input that is asserted.

24 Binary Adder Half adder Full adder AND ExOR Exclusive OR (둘이 다르면 T)
INPUTS OUTPUTS A B CARRY SUM 1 AND AND ExOR INPUTS OUTPUTS A B CIN COUT S 1 Full adder Carry input이 있어서 여러 개의 adder 연결 가능)

25 ’83 8bit adder ’83 A_low B_low A_high B_high
A1 A2 A3 A4 B1 B2 B3 B4 S1 S2 S3 S4 Cin Cout ’83 8bit adder A1 A2 A3 A4 B1 B2 B3 B4 S1 S2 S3 S4 Cin Cout ’83 A_low B_low A_high B_high LSB MSB *ALU: arithmetic logic unit(addition, substraction, bit shift, magnitude comparision) *floating point processor

26 4. Sequential Logic -circuits in which the output state depends both on the input states and on the previous history. flip-flops

27 Set-reset type flip-flop (SR flip-flop)
using NOR gates 1 Q NOR Q Q Q Q 1 Q latch : 이전의 상태 유지 이 상태는, 다른 상태로 바뀔 때 output이 어떤 값이 나올지 예측이 어렵기때문에 정상적인 동작에서는 사용 안함 using NAND gates NAND S R Q 1 latch

28 Set-reset type flip-flop (SR flip-flop)의 불안정 상태
시작점 1 1 1 시작점 1 1 1 (1,1)에서 (0, 0)으로 바뀔때, 어느쪽 값이 먼저 바뀌는지에 따라 결과가 다를수 있다.

29 Gated SR latch R 1 S E: Enable D latch 1bit memory!

30 NOT(A AND B)= NOT(A) OR NOT(B)
Q D M D D 1 D 1 S D R 1 M D D 1 D 1 Q 실질적으로 이 부분은, NAND 게이트를 이용한 SR flip-flop (슬리이드 27쪽 참조) NAND 게이트 역할 NOT(A AND B)= NOT(A) OR NOT(B) S R Q 1 latch Clock이 1일 때 D값이 Q에 반영

31 Negative-edge-triggered or falling-edge-triggered D Flip-Flop
M D D D D M M D 1 1 1 1 D 1 D 1 1 M M D M D D slave master Clock이 1->0일 때 D값이 Q에 반영

32 Positive-edge-triggered or rising-edge-triggered D flip-flop
1 D 1 D D 1 D 1 1 Q D Q (D) 1 D Q D Q ( D ) 1 1 D 1 D D NAND gate flip-flop 1 D 1 D D D Clock이 0->1일 때 D값이 Q에 반영

33 J-K Flip Flop 1 Q Q Q Q 1 Q Q Q Q 1 J와 K가 모두 1일 경우, Clock이 0->1일 때 Q값이 반대로 바뀜

34 Flip Flop의 응용 : Counter

35 inverted input normal input

36 5. Digital Meets Analog

37 Motivation Computer interface & programming! 센서 actuator analog
digital 센서회로 센서 컴퓨터 Interface board 외부세계 (빛, 온도, 압력, 전류,…) actuator Driver Computer interface & programming!

38 summing amp로 더하여 Vout을 내줌.
DAC 각 digit의 값을, summing amp로 더하여 Vout을 내줌. ADC priority encoder 12bit --> 2000:1 R-2R ladder 8I 4I 2I I 8I 4I 2I I comparator

39 A/D and D/A converters (Nyquist-Shannon) sampling theorem: exact reconstruction of a continuous-time baseband signal from its samples is possible if the signal is bandlimited and the sampling frequency is greater than twice the signal bandwidth. *The theorem also leads to a formula for the reconstruction. *Nyquist rate: twice the bandwidth of the continuous time signal. *Nyquist frequency or critical frequency: half the sample rate. *downsampling & alias *anti-aliasing filter 예) 디지탈 음악 샘플링

40

41 Multiplexing & Three state logic
1 close high-Z close 1 Bus line에 사용

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43 Digital interfaces (parallel)
-Centronics parallel interfaces -GPIB (General purpose interface bus) Digital interfaces (serial) -RS232C -USB

44 채터링(또는 바운싱) 문제 -회로(특히, 디지탈 회로)는, 연결이 안된 단자가 있을 경우, 그 단자의 값이 0과 1사의 값을 떠돌게 되서, 예상이 안되는 output 값이 나오게 됨. -예를들어, 스위치가 디지탈 회로에 직접 연결되면, 스위치가 닫히거나 떨어지는 순간에 신호가 날뛸 수 있는데, 이러한 문제를 채터링(또는 바운싱) 문제라고 함 -디지탈 회로에 스위치를 연결할때, 단자의 값이 흔들림없이 0과 1사이를 천천히 변하도록 하기 위하여, capacitor를 이용한 회로를 사용한다.