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目 次 1. In-Circuit Test 2. Terminology 3. Probe 4. Testpoint process 目 次 1. In-Circuit Test 2. Terminology 3. Probe 4. Testpoint process 5. Testpoint Technology 6. Testpoint Requirement and Rules 7. Testpoint Generation 8. Testpoint Reference 9. Testpoint Layers 10. Create Artworks and Drills 11. Probe Selection Priority Hierarchy 12. Testpoint Generation Steps 13. ATE Netlist

1.In-Circuit Test

In-Circuit Test PCB : 배치/배선, TP 설정 Probe : TP 하나에 1개 필요 Fixture : TP Hole Drill Probe Socket 삽입 TP 당 1개 이상 배선 고가 - 최소 1000만원 Computer : test program Connector : 서로 맞물림 wire wrapping coaxial cable twist pair DUT : Stimulus & Measurement digital/analog signal generator data storage power source Test pin 수에 따라 확장

2. Terminology

3. Probes

4. Testpoint process net 또는 Pin에 testpoint 요구사양 입력 Prove와 Fixture geometry 작성 testpoint mapping and insert (shove, stub) 제조 데이타 및 문서 작성 Back annotation Testpoint Mapping/Insertion Standards Logic Designer Logic-level Test Requirements Layout Testpoint Layout Fixture & Probe Geometries Back Annotate Testpoint Data Manufacturing Data Design Rules Override Logic-level Test Requirements Invoke Setup Testpoint Generation Report Results Save

5. Testpoint Technology 실제 사용하는 Fixture/Probe를 쓸 경우 Real 선택

6. Testpoint Requirement and Rules

7. Testpoint Generation Unused Pin에는ICT가 필요없는 경우 2개 모두 선택안함 Options에서 간격 및 Clearence 지정

8. Testpoint Reference

9. Testpoint Layers

10. Create Artworks and Drills

11. Probe Selection Priority Hierachy 1. Pin-tp_Req 2. Net_tp_Req 3. Component probe attribute 4. Fixture probe area 5. Fixture 6. Default menu requirements

12. Testpoint Generation Steps 1. critical nets에 우선 Tp 지정 2. 기존 pin이나 Via에 Auto-map으로 Tp 지정 3. 기존 trace 위에 smt-via Tp Auto-insert 4. 기존 trace 위에 thru-via Tp Auto-insert 5. Auto-shove 기능을 사용 3,4 step 반복(회사규정에 준함) 6. stub 길이 지정 smt-via Tp Auto-insert 7. stub 길이 지정 thru-via Tp Auto-insert 8. no-connect 된 net에 manual로 Tp 지정

Geometry name of the mapped probe 13. ATE Netlist Geometry name of the mapped probe Probe x,y location in fixture coordinates Testpoint reference designator Drill mask size for the probe Side of the board (Top or Bottom) Net name of the testpoint Component reference designator of pin testpoint Pin name of pin testpoint Geometry name of the pin or via padstack Testpoint x,y location in board coordinates