Dept. of Electronics & Info. Eng. Prof. Jongbok Lee Ch. 7 Decoders & Encoders Dept. of Electronics & Info. Eng. Prof. Jongbok Lee

1. 3x8 Decoder Decoder : Combinational circuit which changes N-bit input to 2N outputs 2x4 decoder, 3x8 decoder...

entity decoder is port ( a : in std_logic_vector(2 downto 0); e : in std_logic; q : out std_logic_vector(7 downto 0)); end decoder; architecture behavioral of decoder is begin process(a,e) if (e=‘0’) then case a is when “000” => q <= “11111110”; when “001” => q <= “11111101”; when “010” => q <= “11111011”; when “011” => q <= “11110111”; when “100” => q <= “11101111”; when “101” => q <= “11011111”; when “110” => q <= “10111111”; when “111” => q <= “01111111”; when others => q <= “11111111”; end case; else q <= “11111111”; end if; end process; end behavioral;

G3 G4 H3 H4 %실험 맨왼쪽 푸쉬버튼을 누르면서 세개 버튼을 누르면(000) 맨오른쪽만 꺼짐(11111110) signal pin no. cable connections a(0) H4 JP4.0 CN3.22 a(1) H3 JP4.1 CN3.23 a(2) G4 JP4.2 CN3.24 e G3 JP4.3 CN3.26 q(0) A12 JP6.0 CN1.17 q(1) A14 JP6.1 CN1.18 q(2) B14 JP6.2 CN1.19 q(3) B13 JP6.3 CN1.20 q(4) C12 JP6.4 CN1.21 q(5) C9 JP6.5 CN1.22 q(6) D9 JP6.6 CN1.23 q(7) P16 JP6.7 CN1.24 P16 D9 C9 C12 B13 B14 A14 A12 G3 G4 H3 H4 %실험 맨왼쪽 푸쉬버튼을 누르면서 세개 버튼을 누르면(000) 맨오른쪽만 꺼짐(11111110)

2. BCD to 7 segment decoder function : inputs 4-bit BCD code and express as Arabic numbers by using 7 LEDs. % 순서 h-g-f-e-d-c-b-a 0 : 0 0 1 1 1 1 1 1 1 :0 0 0 0 0 1 1 0 2 :0 1 0 1 1 0 1 1

entity bcd7seg is port (bcd : in std_logic_vector(3 downto 0); digit : out std_logic_vector(6 downto 1); segment : out std_logic_vector(7 downto 0)); end bcd7seg; architecture behavioral of bcd7seg is begin digit <= “100000”; process(bcd) if (bcd=x”0”) then segment<=x”3F”; elsif (bcd=x”1’) then segment<=x”06”; elsif (bcd=x”2”) then segment<=x”5B”; elsif (bcd=x”3”) then segment<=x”4F”; elsif (bcd=x”4”) then segment<=x”66”; elsif (bcd=x”5”) then segment<=x”6D”; elsif (bcd=x”6”) then segment<=x”7D”; elsif (bcd=x”7”) then segment<=x”07”; elsif (bcd=x”8”) then segment<=x”7F”; elsif (bcd=x”9”) then segment<=x”67”; else segment <=x“00”; end if; end process; end behavioral;

signal pin no. cable connections bcd(0) H4 JP4.0 CN3.22 bcd(1) H3 JP4.1 CN3.23 bcd(2) G4 JP4.2 CN3.24 bcd(3) G3 JP4.3 CN3.26 digit(1) F4 digit(2) E4 digit(3) F2 digit(4) F3 digit(5) G5 digit(6) F5 segment(0) T12 JP6.0 CN1.2 segment(1) T14 JP6.1 CN1.3 segment(2) N12 JP6.2 CN1.4 segment(3) P13 JP6.3 CN1.5 segment(4) T10 JP6.4 CN1.6 segment(5) R13 JP6.5 CN1.7 segment(6) T13 JP6.6 CN1.8 segment(7) P12 JP6.7 CN1.9 %실험 모두 누르면 입력 0000 출력 0 누르고 떼고 누르고 떼면 입력 0101 출력 5 가운데 두개 누르면 입력 1001 출력 9 G3 G4 H3 H4

3. 8x3 Encoder function : ex : receives 2N inputs and produces N outputs the opposite of decoder ex : 4x2 encoder 8x3 encoder

entity encoder is port (d : in std_logic-vector(7 downto 0); q : out std_logic-vector(2 downto 0); valid : out std_logic); end encoder; architecture behavioral of encoder is begin process(d) if (d=“11111110”) then q<=“000”; valid <= ‘1’; elsif (d=“11111101”) then q<=“001”; valid <=‘1’; elsif (d=“11111011”) then q<=“010”; valid <=‘1’; elsif (d=“11110111”) then q<=“011”; valid <=‘1’; elsif (d=“11101111”) then q<=“100”; valid <=‘1’; elsif (d=“11011111”) then q<=“101”; valid <=‘1’; elsif (d=“10111111”) then q<=“110”; valid <=‘1’; elsif (d=“01111111”) then q<=“111”; valid <=‘1’; else valid <=‘0’; end if; end process; end behavioral;

(1) DIP스위치를 전부 내리고 오른쪽 끝만 올리면 입력 11111110 출력은 000 왼쪽끝 valid bit만 켜지고 0 signal pin no. cable connections d(0) G1 JP4.0 CN3.22 d(1) M14 JP4.1 CN3.23 d(2) L13 JP4.2 CN3.24 d(3) G15 JP4.3 CN3.26 d(4) G14 JP4.4 CN3.27 d(5) B16 JP4.5 CN3.28 d(6) C16 JP4.6 CN3.29 d(7) R16 JP4.7 CN3.30 q(0) A12 JP6.0 CN1.17 q(1) A14 JP6.1 CN1.18 q(2) B14 JP6.2 CN1.19 valid P16 JP6.3 CN1.20 %실험 (1) DIP스위치를 전부 내리고 오른쪽 끝만 올리면 입력 11111110 출력은 000 왼쪽끝 valid bit만 켜지고 0 (2) DIP스위치를 오른쪽에서 두번째만 올리면 입력 11111101 출력은 001 왼쪽 끝 valid bit과 오른쪽 끝만 켜짐